The present invention relates to a flash memory device and more particularly to a method for storing data used in an initial power up.
As the demand for mobile devices such as a camcorder, a digital camera, a portable phone, an MP3 (MPEG-1 Layer 3) player, etc. increases, efforts also increase to enhance the flash memory device.
A NAND flash memory device employed in the mobile device operates in accordance with an application program, wherein option of the NAND flash memory device is determined in accordance with the operation characteristics of the mobile device.
The applications requiring the mobile device has increased accordingly as new techniques are developed. Hence, a method for providing flexible options to the NAND flash memory device has been required.
FIG. 1 is a block diagram illustrating a conventional flash memory device.
In FIG. 1, the flash memory device 100 includes a memory cell array 110 having memory cells for storing data, a surrounding circuit 120 for storing data in the memory cell array 110 or reading data from the memory cell array 110, a controller 130 for controlling operation of the flash memory device 100 by controlling the surrounding circuit 120, an initial data latching circuit 140 for temporarily storing administrative information required for operation of the flash memory device 100 in an initial operation (i.e., power up) of the flash memory device 100, and a fuse circuit 150 for storing initial administrative information to be stored in the initial data latching circuit 140 using sub-fuse circuits.
The memory cell array 110 includes the memory cells.
The surrounding circuit 120 is connected to the memory cell array 110 and includes a page buffer for programming data in the memory cells or reading data from the memory cells.
The controller 130 outputs a control signal for controlling operation of the surrounding circuit 120.
The fuse circuit 150 has a plurality of sub-fuse circuits for storing data, and generates administrative information for controlling operation of the flash memory device 100 by combining information stored in the sub-fuse circuits. Here, the administrative information includes voltage setting information, etc. for operating optimally the flash memory device 100 in accordance with a system used in the flash memory device 100. The administrative information is stored in the initial data latching circuit 140 when the flash memory device 100 is operated at the initial power up so that the controller 130 uses the administrative information.
However, the sub-fuse circuits occupy much space compared to a transistor, thereby affecting the size of a memory chip which has become highly integrated. In addition, if the sub-fuse circuit is cut, the sub-fuse circuit may not be connected again. As a result, yield may be lowered due to a cutting error.